Static random access memory (SRAM) is memory that utilizes latching to store each bit. Because SRAM is static, there is no need to periodically refresh the memory, and is, therefore, typically faster, less dense, and more expensive, than dynamic random-access memory (DRAM). Due to SRAM's speed, SRAM is typically used in computer applications that require a fast memory such as cache memory for the central processing unit (CPU), external burst mode SRAM caches, hard disk buffers, router buffers, CPU register files, etc. SRAM typically includes an SRAM array of storage cells arranged in rows and columns. At the intersection of each word line corresponding to the rows and bit lines corresponding to the columns resides a storage cell that stores data. Each storage cell may be formed with a pair of cross-coupled inverters. Each inverter includes a p-channel (PMOS) transistor and an n-channel (NMOS) transistor. Gate enhanced drain leakage (GEDL) in the SRAM array may account for a large percentage (e.g., 60%) of total SRAM leakage. SRAM array leakage, mainly due to the GEDL component, may contribute a significant portion of total system on a chip (SOC) leakage.